AI Power Demands Push GaN into Data Center Design

Efficient Power Conversion (EPC) CEO Alex Lidow and VP Jason Zhang said at the EE Power Asia 2026 Spark Session that silicon MOSFETs have hit their performance ceiling for AI data center power, with each generation improving only around 20%, while AI accelerators have seen a fourfold power increase across three GPU generations and individual GPUs are expected to dissipate up to 5 kW at core voltages below 1 V with currents approaching 10,000 A within two years. EPC's seventh-generation gallium nitride platform, spanning low-voltage products from 18 V to 40 V, switches efficiently at about 3 MHz in synchronous buck converters — roughly 3× comparable silicon — with a roadmap targeting near 10 MHz and current densities of roughly 5 A/mm².

The rapid increase in AI computing performance is forcing a fundamental redesign of data center power architectures, with gallium nitride GaN emerging as a key technology for meeting the industry’s escalating efficiency and power density requirements. Speaking at the recent EE Power Asia 2026 Spark Session https://www.eetasia.com/spark/epa2026/ , Alex Lidow, CEO of Efficient Power Conversion EPC , and Jason Zhang, VP of DC/DC marketing and system engineering at EPC, outlined why conventional silicon power devices are approaching their practical limits as GPU power consumption continues to climb. According to Zhang, AI accelerators have experienced a fourfold increase in power consumption across three GPU generations. Within the next two years, individual GPUs are expected to dissipate as much as 5 kW while operating at core voltages below 1 V, requiring current levels approaching 10,000 A. “When you have hundreds or thousands of GPUs in one data center, the data center scales toward a gigawatt,” Zhang said. View All https://www.eetimes.com/category/sponsored-content/ Meeting those requirements requires multiple stages of power conversion, from 480-V three-phase AC to an 800-V DC bus, followed by intermediate voltages such as 12 V or 6 V before reaching the GPU core voltage. Each conversion stage must deliver extremely high current while minimizing losses and occupying as little board space as possible. AI architectures driving power redesign The transition to AI infrastructure is also changing how power is distributed inside hyperscale servers. Lidow said conventional architectures that brought AC power directly into server racks are giving way to centralized sidecar power systems that deliver an 800-V DC bus into each rack. Power conversion then occurs directly on the server board, eliminating bulky power supply drawers while reducing distribution losses. “The rack now is receiving 800 V instead of AC, and it needs to break it down to eventually 0.7, 0.6 or 0.5 V for the GPU,” Lidow explained. Although higher distribution voltage reduces current flowing into the server, the final conversion stages must still supply thousands of amperes to modern AI processors. This places enormous pressure on power converters to achieve both high efficiency and high current density. Lidow described server board space as “the most expensive real estate in the world,” making power density as important as efficiency. Higher switching frequencies reduce the size of magnetic components, allowing more power conversion circuitry to fit within the limited space surrounding AI processors. Silicon approaches its limits Both speakers argued that silicon MOSFET technology has largely reached its performance ceiling for next-generation AI systems. Zhang noted that silicon has steadily improved over the years but is now approaching its theoretical limit in terms of on-resistance. Incremental improvements have become increasingly difficult while AI power requirements continue to accelerate. “Each generation improves only around 20%,” Zhang said. “It’s just not enough. They cannot keep up with the sheer speed of the power requirement.” GaN devices, by comparison, continue to improve rapidly. EPC’s seventh-generation platform introduces lower on-resistance and lower gate charge across both higher-voltage devices and a new family of low-voltage products ranging from 18 V to 40 V, targeting the multiple conversion stages inside AI servers. Lower gate charge enables higher switching frequencies, reducing the size of passive components while increasing overall power density. Zhang added that EPC’s Gen 7 devices are capable of switching efficiently at about 3 MHz in synchronous buck converters, roughly 3× the switching frequency typically achieved by comparable silicon implementations. The company’s roadmap targets switching frequencies approaching 10 MHz, enabling current densities of roughly 5 A/mm² for future AI processors requiring 10,000 A of current. GaN expands throughout the server Lidow expects GaN to be deployed across virtually every power conversion stage inside future AI servers. Today, GaN is already widely used in the 48-V input stage. As AI architectures migrate toward 800-V distribution and lower intermediate voltages, GaN is being designed into additional conversion stages, including 800-V input converters, intermediate bus converters, and point-of-load regulators. “GaN is everywhere on the server card, and silicon no longer can meet these requirements,” Lidow said. He explained that lower-voltage conversion stages require substantially more semiconductor area because current increases as voltage decreases. Consequently, GaN adoption is expected to accelerate as power conversion moves closer to the GPU. “It’s almost like a wave of GaN going across that server card right now,” Lidow said. Scaling manufacturing and ensuring reliability One concern surrounding widespread GaN deployment has been manufacturing capacity. Zhang argued that this is no longer a limiting factor. Unlike silicon carbide SiC , GaN devices are produced on silicon substrates using largely conventional silicon manufacturing equipment, supplemented by epitaxial growth processes. EPC also relies on multiple ecosystem partners for wafer fabrication, testing, packaging, and logistics. “The good thing about GaN is that GaN has no capacity constraint,” Zhang said. Reliability has also evolved significantly over nearly two decades of development. Rather than relying solely on traditional silicon qualification methods, EPC evaluates GaN devices within their intended applications, identifies intrinsic failure mechanisms, and modifies device design and manufacturing processes to eliminate them. “The major variation variable in terms of field reliability is how the part is used and the customer side,” Zhang said, noting that thermal interfaces, PCB mounting, and heatsink attachment have become more significant factors than intrinsic device reliability. Lidow added that EPC’s GaN devices have already accumulated eight years of deployment on AI data center cards with “phenomenal reliability.” Meanwhile, beyond improving GPU power delivery, both executives argued that GaN plays a growing role in reducing overall data center operating costs. Zhang noted that hyperscale operators increasingly evaluate total facility efficiency rather than only processor performance. Even modest improvements in conversion efficiency can significantly reduce electricity consumption, cooling requirements and water usage across gigawatt-scale AI facilities. “GaN can easily improve overall efficiency by 5% from AC to the core,” Zhang said. “The 5% is a lot in terms of operating costs.” He also expects environmental considerations to become increasingly important as AI infrastructure expands, particularly in regions where electricity consumption, water usage and community impact are receiving greater regulatory scrutiny. What’s next Looking ahead, Lidow expects AI power architectures to continue evolving toward higher distribution voltages and lower intermediate bus voltages. While 800-V distribution is becoming the industry baseline, future GPU generations may require 1,200-V, 1,500-V or even 2,000-V primary buses, supported by multilevel converter topologies, he said. Intermediate buses are expected to move from 12 V toward 6 V before direct GaN conversion to sub-1 V GPU core supplies. Within EPC, future development is shifting away from discrete transistors toward increasingly integrated GaN power ICs. “I think we have squeezed all that we can out of GaN discretes,” Lidow said. “Going forward, I think all of our developments are going to be ICs.” He believes integration will become necessary as switching speeds continue to increase, enabling distributed gate drivers, monolithic power stages, and higher levels of functionality that cannot be achieved with discrete components alone. Lidow concluded that GaN will continue expanding its role inside AI servers as compute requirements increase. “It is clear that in the world of servers, GaN will dominate the server card,” he said. “I think we will get every single power socket on there.” This article was originally published in the EE Times Recommend ASEAN e-guide July 2026 . SSIA’s Ang Wee Seng Discusses Trends and Opportunities https://www.eetasia.com/ssias-ang-wee-seng-discusses-trends-challenges-and-semiconductor-opportunities-in-2025/ CES 2026: Taiwanese Tech Startups, Supply Chain Partners https://www.eetimes.com/ces-2026-taiwanese-tech-startups-supply-chain-partners-bring-ai-to-real-world-applications/ Asia Focus: Three CEO Perspectives from India, Thailand and Malaysia https://www.eetimes.com/asia-focus-three-ceo-perspectives-from-india-thailand-and-malaysia/ STMicro Advances PiezoMEMS Development in Singapore https://www.eetimes.com/stmicro-advances-piezomems-development-in-singapore/