# Adisyn’s graphene tech makes a 200mm leap as US patent moat widens > Source: > Published: 2026-08-17 20:35:13+00:00 # Adisyn’s graphene tech makes a 200mm leap as US patent moat widens **Adisyn scales graphene up to 200mm wafer****Second US patent allowance strengthens protection****Industry partnerships and 300mm wafers come next** The semiconductor industry has spent decades making chips smaller, faster and more powerful. But while the transistors have kept shrinking, the microscopic copper wiring connecting them is beginning to run out of room. These interconnects move signals around a chip and as they become smaller, electrical resistance rises, more heat is generated and more energy is wasted – an increasingly awkward problem when AI computing is demanding more processing power than ever. That is the bottleneck [ Adisyn (ASX:AI1)](https://stockhead.com.au/company/adisyn-ai1/) is trying to crack. Through its wholly owned subsidiary 2D Generation, Adisyn is developing a low temperature Atomic Layer Deposition (ALD) process that can grow graphene directly on semiconductor surfaces. ALD is already standard in major chip factories, so Adisyn’s technology could slot into existing production lines. Graphene, meanwhile, has the electrical and thermal properties to potentially improve the performance and reliability of increasingly tiny interconnects. The challenge has never been convincing the industry of graphene’s potential. It has been producing graphene repeatedly, at a low enough temperature and across a large enough surface for commercial semiconductor manufacturing. Adisyn’s two latest announcements attack that problem from both sides. ## Protecting the process and the product The first development came in late July, when the United States Patent and Trademark Office allowed Adisyn’s second US patent application covering graphene-coated 3D surfaces. The application – jointly held by 2D Generation and its research partner – claims focus on the characteristics of the finished graphene-coated product, rather than being limited to one particular manufacturing method. That distinction is crucial because a process patent protects the recipe. Product-focused claims can potentially protect what comes out of the oven, even if somebody else tries to make it using a different recipe. “This latest allowance adds product-focused claims covering graphene-coated surfaces and interconnects with defined characteristics, including manufacturing routes that do not rely on the Adisyn’s own precursors or processes,” said managing director Arye Kohavi. The new patent claims cover graphene coatings that spread evenly across complex 3D surfaces. They also cover certain interconnects with copper grains below 0.9 microns, fewer shorts and voids after high temperature processing, and substantially free of conventional diffusion-barrier materials. That barrier normally stops copper leaking into surrounding layers. Removing it could free up valuable space as chips get smaller. The claims also include coatings free from nitrogen doping, FeCl3 residue and leftover metal catalyst particles – important purity requirements for semiconductor manufacturing. “These characteristics are directly relevant to the challenges facing next-generation semiconductors,” Kohavi said. Together, Adisyn’s two US patent allowances are designed to protect both how its graphene coatings are made and important features of the finished product. Adisyn is also keeping parts of its technology as trade secrets, including proprietary processes and accumulated know-how. That gives it several layers of protection: patent the technology competitors may be able to see, while keeping selected operating knowledge inside the tent. ## Graphene makes the 200mm leap A strong patent position is useful, but semiconductor customers will ultimately want to see the process work at an industrially relevant scale. In June, Adisyn demonstrated repeatable graphene deposition on a 1cm² copper coupon using an industrial ALD system at temperatures below 300°C. Independent testing confirmed graphene formation across that small surface, showing the result could be reproduced rather than being a lucky laboratory one-off. The next job was to go bigger. Adisyn has now applied its low-temperature deposition process to an entire 200mm copper semiconductor wafer with a surface area of approximately 314cm² – roughly 300 times the area of the earlier coupon. “This is a huge step forward for Adisyn and a strong demonstration of the speed at which our graphene semiconductor technology is advancing,” Kohavi said. The 200mm format is already widely used across global semiconductor manufacturing. Adisyn says the result is the first publicly disclosed demonstration of low temperature graphene deposition across an entire wafer of that size. Testing was not confined to the comfortable bit in the middle, either. Twelve sampling locations were selected across all four quadrants and at different distances from the wafer’s centre. Each location was measured five times using Raman spectroscopy, a technique that identifies materials through their molecular fingerprint. Samples from all 12 locations were also examined using Transmission Electron Microscopy at the Hebrew University of Jerusalem. TEM provides nanoscale imaging capable of examining material structures at extremely high magnification. Graphene was identified at every sampled location, supporting deposition across the full 200mm wafer diameter. “Scaling a new materials technology from laboratory samples to a full 200mm semiconductor wafer presents significant technical challenges,” Kohavi said. “Achieving that step – and identifying graphene at all 12 locations independently tested across the wafer – provides important validation of our technology and development approach.” ## Two risks coming off the table For investors, the patent allowance and wafer result fit together neatly. The latest patent allowance potentially makes Adisyn’s technology more difficult to work around. The 200mm result, meanwhile, indicates that the process is not trapped on a tiny laboratory sample. Adisyn must still demonstrate greater uniformity, low defect rates, and repeatability before the technology can be qualified for semiconductor manufacturing. But the company has moved beyond merely asking whether it can form graphene at a semiconductor-compatible temperature on a small coupon. The speed of that progress is also notable. Adisyn said the result brought forward its timeline for industry collaborations and device integration. “This provides a stronger foundation from which to pursue potential joint development programs with semiconductor manufacturers and evaluate future commercial applications,” said Kohavi. The next target is the 300mm wafer used in advanced AI and high-performance computing chips, as Adisyn refines the process and talks to potential industry partners. The job isn’t finished. But Adisyn has just made the technology bigger, the IP moat wider and its path into the semiconductor industry considerably shorter. **Now read more: Adisyn taps Israeli manufacturing heavyweight to fast-track stealth drone tech** *At Stockhead we tell it like it is. While Adisyn is a Stockhead advertiser, it did not sponsor this article.* *This story does not constitute financial product advice. You should consider obtaining independent advice before making any financial decision.* ## Related Topics ### UNLOCK INSIGHTS Discover the untold stories of emerging ASX stocks. Daily news and expert analysis, it's free to subscribe. By proceeding, you confirm you understand that we handle personal information in accordance with our [Privacy Policy](https://stockhead.com.au/privacy-policy/).