{"slug": "accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels", "title": "Accelerating Transformer Training with NVIDIA Transformer Engine, Fused Kernels, BF16, FP8, and GPU Benchmarking", "summary": "NVIDIA's Transformer Engine accelerates transformer training on Ampere and newer GPUs by fusing kernels and using BF16/FP8 computation, with FP8 support limited to compute capability 8.9 or higher. The tutorial demonstrates building a GPT-style model with te.Linear, te.LayerNorm, te.LayerNormLinear, te.LayerNormMLP, and te.TransformerLayer, configuring a delayed-scaling FP8 recipe with hybrid E4M3/E5M2 formats, and benchmarking runtime and memory against pure-PyTorch fallback.", "body_md": "In this tutorial, we explore how[ NVIDIA Transformer Engine](https://github.com/NVIDIA/TransformerEngine)\n\n**accelerates transformer workloads by combining fused GPU kernels, BF16 computation, and hardware-aware FP8 execution. We begin by installing Transformer Engine and detecting the active GPU architecture so that we can determine whether the runtime supports TE kernels, FP8 tensor cores, or only the pure-PyTorch fallback path. We then examine core fused components such as te.Linear, te.LayerNorm, te.LayerNormLinear, te.LayerNormMLP, and te.TransformerLayer, while also configuring a delayed-scaling FP8 recipe that manages tensor scaling, amax history, and hybrid E4M3/E5M2 formats. Using these components, we construct a compact GPT-style causal language model, train it on deterministic synthetic sequences, compare higher-precision and FP8 execution, measure runtime and peak GPU memory, inspect FP8 metadata, and validate the trained model through autoregressive generation.**\n\n``` python\nimport subprocess, sys, os\ndef pip_install(*pkgs):\n   subprocess.run([sys.executable, \"-m\", \"pip\", \"install\", \"-q\",\n                   \"--no-build-isolation\", *pkgs], check=False)\nprint(\">> Installing transformer_engine[pytorch] (this can take a few minutes)...\")\npip_install(\"transformer_engine[pytorch]\")\nimport time, math, gc\nimport torch\nimport torch.nn as nn\nimport torch.nn.functional as F\nassert torch.cuda.is_available(), \"Enable a GPU runtime in Colab first!\"\nDEVICE = \"cuda\"\nprops = torch.cuda.get_device_properties(0)\nCC = (props.major, props.minor)\nGPU_NAME = props.name\nprint(f\">> GPU: {GPU_NAME} | compute capability {CC[0]}.{CC[1]} | \"\n     f\"{props.total_memory/1e9:.1f} GB\")\nTE_CAPABLE  = CC >= (8, 0)\nFP8_CAPABLE = CC >= (8, 9)\nte = None\nif TE_CAPABLE:\n   try:\n       import transformer_engine.pytorch as te\n       from transformer_engine.common import recipe\n       print(\">> Transformer Engine imported OK:\",\n             getattr(te, \"__version__\", \"unknown version\"))\n   except Exception as e:\n       print(f\">> TE import failed ({e}); using pure-PyTorch fallback.\")\n       TE_CAPABLE = FP8_CAPABLE = False\nelse:\n   print(\">> GPU is pre-Ampere (e.g. T4): TE kernels unsupported -> fallback mode.\")\nif TE_CAPABLE and FP8_CAPABLE and te is not None:\n   try:\n       ok, reason = te.fp8.check_fp8_support()\n       FP8_CAPABLE = bool(ok)\n       if not ok:\n           print(\">> TE reports FP8 unsupported:\", reason)\n   except Exception:\n       pass\nprint(f\">> Mode: TE={'ON' if TE_CAPABLE else 'OFF'} | \"\n     f\"FP8={'ON' if FP8_CAPABLE else 'OFF (will use BF16)'}\")\ntorch.manual_seed(1234)\nif TE_CAPABLE:\n   H = 768\n   x_demo = torch.randn(8, 32, H, device=DEVICE, dtype=torch.bfloat16)\n   lin      = te.Linear(H, H, bias=True, params_dtype=torch.bfloat16).to(DEVICE)\n   ln       = te.LayerNorm(H, params_dtype=torch.bfloat16).to(DEVICE)\n   ln_lin   = te.LayerNormLinear(H, 3 * H, params_dtype=torch.bfloat16).to(DEVICE)\n   ln_mlp   = te.LayerNormMLP(H, 4 * H, params_dtype=torch.bfloat16).to(DEVICE)\n   with torch.no_grad():\n       print(\"\\n>> Module tour (shapes):\")\n       print(\"   te.Linear         \", tuple(lin(x_demo).shape))\n       print(\"   te.LayerNorm      \", tuple(ln(x_demo).shape))\n       print(\"   te.LayerNormLinear\", tuple(ln_lin(x_demo).shape))\n       print(\"   te.LayerNormMLP   \", tuple(ln_mlp(x_demo).shape))\n   del lin, ln, ln_lin, ln_mlp, x_demo\n   gc.collect(); torch.cuda.empty_cache()\nfp8_recipe = None\nif FP8_CAPABLE:\n   fp8_recipe = recipe.DelayedScaling(\n       fp8_format=recipe.Format.HYBRID,\n       amax_history_len=16,\n       amax_compute_algo=\"max\",\n   )\n   print(\"\\n>> FP8 recipe:\", fp8_recipe)\n```\n\nWe install NVIDIA Transformer Engine and initialize the PyTorch environment required for GPU-accelerated execution. We inspect the active GPU, compute capability, and memory capacity to determine whether fused TE kernels and FP8 tensor cores are available. We also validate the core fused modules and configure a delayed-scaling FP8 recipe while preserving an automatic PyTorch fallback for unsupported hardware.\n\n```\nVOCAB, D_MODEL, N_HEADS, N_LAYERS, FFN, SEQ = 96, 768, 12, 4, 3072, 256\nclass MiniGPT_TE(nn.Module):\n   \"\"\"Causal LM where every block is a single fused te.TransformerLayer.\"\"\"\n   def __init__(self):\n       super().__init__()\n       self.emb = nn.Embedding(VOCAB, D_MODEL)\n       self.pos = nn.Embedding(SEQ, D_MODEL)\n       self.blocks = nn.ModuleList([\n           te.TransformerLayer(\n               hidden_size=D_MODEL,\n               ffn_hidden_size=FFN,\n               num_attention_heads=N_HEADS,\n               self_attn_mask_type=\"causal\",\n               layer_number=i + 1,\n               params_dtype=torch.bfloat16,\n               hidden_dropout=0.0,\n               attention_dropout=0.0,\n           )\n           for i in range(N_LAYERS)\n       ])\n       self.ln_f = nn.LayerNorm(D_MODEL)\n       self.head = nn.Linear(D_MODEL, VOCAB, bias=False)\n   def forward(self, idx):\n       B, T = idx.shape\n       h = self.emb(idx) + self.pos(torch.arange(T, device=idx.device))\n       h = h.to(torch.bfloat16)\n       for blk in self.blocks:\n           h = blk(h)\n       h = self.ln_f(h.float())\n       return self.head(h)\nclass Block_PT(nn.Module):\n   \"\"\"Plain-PyTorch transformer block, mirrors te.TransformerLayer.\"\"\"\n   def __init__(self):\n       super().__init__()\n       self.ln1 = nn.LayerNorm(D_MODEL)\n       self.attn = nn.MultiheadAttention(D_MODEL, N_HEADS, batch_first=True)\n       self.ln2 = nn.LayerNorm(D_MODEL)\n       self.mlp = nn.Sequential(nn.Linear(D_MODEL, FFN), nn.GELU(),\n                                nn.Linear(FFN, D_MODEL))\n   def forward(self, x, mask):\n       a, _ = self.attn(self.ln1(x), self.ln1(x), self.ln1(x),\n                        attn_mask=mask, need_weights=False)\n       x = x + a\n       return x + self.mlp(self.ln2(x))\nclass MiniGPT_PT(nn.Module):\n   def __init__(self):\n       super().__init__()\n       self.emb = nn.Embedding(VOCAB, D_MODEL)\n       self.pos = nn.Embedding(SEQ, D_MODEL)\n       self.blocks = nn.ModuleList([Block_PT() for _ in range(N_LAYERS)])\n       self.ln_f = nn.LayerNorm(D_MODEL)\n       self.head = nn.Linear(D_MODEL, VOCAB, bias=False)\n   def forward(self, idx):\n       B, T = idx.shape\n       mask = torch.triu(torch.full((T, T), float(\"-inf\"),\n                                    device=idx.device), diagonal=1)\n       h = self.emb(idx) + self.pos(torch.arange(T, device=idx.device))\n       for blk in self.blocks:\n           h = blk(h, mask)\n       return self.head(self.ln_f(h))\nmodel = (MiniGPT_TE() if TE_CAPABLE else MiniGPT_PT()).to(DEVICE)\nn_params = sum(p.numel() for p in model.parameters())\nprint(f\"\\n>> Model: {'TE fused' if TE_CAPABLE else 'pure PyTorch'} | \"\n     f\"{n_params/1e6:.1f}M params | {N_LAYERS} layers x {D_MODEL}d\")\n```\n\nWe define a compact causal language model using fused te.TransformerLayer blocks for Transformer Engine execution. We also implement an equivalent pure-PyTorch transformer architecture with multi-head attention, layer normalization, residual connections, and feed-forward networks. We select the appropriate model dynamically according to GPU support and report the final parameter count and architectural dimensions.\n\n``` python\ndef make_batch(bsz=16):\n   phase  = torch.randint(0, VOCAB, (bsz, 1))\n   stride = torch.randint(1, 7, (bsz, 1))\n   steps  = torch.arange(SEQ + 1).unsqueeze(0)\n   seq = (phase + stride * steps) % VOCAB\n   return seq[:, :-1].to(DEVICE), seq[:, 1:].to(DEVICE)\nopt = torch.optim.AdamW(model.parameters(), lr=3e-4)\ndef run_step(x, y, use_fp8):\n   if TE_CAPABLE and use_fp8:\n       with te.fp8_autocast(enabled=True, fp8_recipe=fp8_recipe):\n           logits = model(x)\n   else:\n       logits = model(x)\n   loss = F.cross_entropy(logits.float().reshape(-1, VOCAB), y.reshape(-1))\n   opt.zero_grad(set_to_none=True)\n   loss.backward()\n   opt.step()\n   return loss.item()\nprint(f\"\\n>> Training 60 steps ({'FP8' if FP8_CAPABLE else 'BF16/FP32'})...\")\nt0 = time.time()\nfor step in range(1, 61):\n   x, y = make_batch()\n   loss = run_step(x, y, use_fp8=FP8_CAPABLE)\n   if step % 10 == 0:\n       print(f\"   step {step:3d} | loss {loss:.4f} | \"\n             f\"{(time.time()-t0)/step*1000:.0f} ms/step\")\nprint(f\">> Final loss: {loss:.4f} (random guess would be ~{math.log(VOCAB):.2f})\")\n```\n\nWe create deterministic arithmetic-pattern sequences that allow the model to learn predictable token transitions across the vocabulary. We configure the AdamW optimizer and implement a training step that conditionally wraps the forward pass in te.fp8_autocast when FP8 execution is supported. We train the model for multiple iterations, monitor the loss and step latency, and compare the final loss against the random-guess baseline.\n\n``` python\ndef bench(use_fp8, iters=30, warmup=10):\n   x, y = make_batch(bsz=32)\n   for _ in range(warmup):\n       run_step(x, y, use_fp8)\n   torch.cuda.synchronize()\n   torch.cuda.reset_peak_memory_stats()\n   t = time.time()\n   for _ in range(iters):\n       run_step(x, y, use_fp8)\n   torch.cuda.synchronize()\n   ms = (time.time() - t) / iters * 1000\n   mem = torch.cuda.max_memory_allocated() / 1e9\n   return ms, mem\nprint(\"\\n>> Benchmark (batch 32, seq 256, fwd+bwd+optim):\")\nms_hi, mem_hi = bench(use_fp8=False)\nprint(f\"   {'BF16' if TE_CAPABLE else 'FP32'}: {ms_hi:7.1f} ms/step | \"\n     f\"peak mem {mem_hi:.2f} GB\")\nif FP8_CAPABLE:\n   ms_f8, mem_f8 = bench(use_fp8=True)\n   print(f\"   FP8 : {ms_f8:7.1f} ms/step | peak mem {mem_f8:.2f} GB\")\n   print(f\"   Speedup: {ms_hi/ms_f8:.2f}x  \"\n         f\"(gains grow with model size — try D_MODEL=2048, N_LAYERS=12)\")\nelse:\n   print(\"   FP8 benchmark skipped — needs an sm_89+ GPU (L4/H100/Ada/Blackwell).\")\nif FP8_CAPABLE:\n   blk = model.blocks[0]\n   for name, m in blk.named_modules():\n       meta = getattr(m, \"fp8_meta\", None)\n       if meta and \"scaling_fwd\" in meta:\n           s = meta[\"scaling_fwd\"]\n           print(f\"\\n>> FP8 state of block-0 submodule '{name}':\")\n           print(\"   scale       :\", s.scale.flatten()[:4].tolist())\n           print(\"   amax_history:\", s.amax_history[0, :4].tolist())\n           break\n```\n\nWe benchmark forward propagation, backpropagation, and optimizer updates using higher-precision and FP8 execution modes. We measure average training-step latency and peak allocated GPU memory to quantify the performance and memory impact of reduced-precision computation. We also inspect the scaling factors and amax history maintained by Transformer Engine to understand how delayed scaling stabilizes FP8 tensors.\n\n``` python\n@torch.no_grad()\ndef generate(prompt_len=8, gen_len=24):\n   x, _ = make_batch(bsz=1)\n   ctx = x[:, :prompt_len]\n   for _ in range(gen_len):\n       inp = ctx[:, -SEQ:]\n       if TE_CAPABLE and FP8_CAPABLE:\n           with te.fp8_autocast(enabled=True, fp8_recipe=fp8_recipe):\n               logits = model(inp)\n       else:\n           logits = model(inp)\n       nxt = logits[:, -1].argmax(-1, keepdim=True)\n       ctx = torch.cat([ctx, nxt], dim=1)\n   return ctx[0].tolist()\nseq = generate()\nprint(\"\\n>> Greedy generation (should continue the arithmetic pattern):\")\nprint(\"   prompt+gen:\", seq)\ndiffs = [(b - a) % VOCAB for a, b in zip(seq, seq[1:])]\nprint(\"   step diffs:\", diffs, \"<- constant stride = model learned the rule\")\nprint(\"\\n>> Done! Things to try next:\")\nprint(\"   * Scale up: D_MODEL=2048, N_LAYERS=12 -> FP8 speedup becomes dramatic\")\nprint(\"   * recipe.Format.E4M3 vs HYBRID; amax_history_len=1024\")\nprint(\"   * te.LayerNormMLP / te.LayerNormLinear in your own architectures\")\nprint(\"   * fp8_model_init() to store weights themselves in FP8 for inference\")\n```\n\nWe implement greedy autoregressive generation by repeatedly feeding the latest context into the trained causal language model. We compare consecutive generated tokens to verify whether the model preserves the constant arithmetic stride present in the synthetic training data. We conclude by identifying practical extensions, including larger model dimensions, alternative FP8 formats, longer amax histories, fused modules, and FP8 weight initialization.\n\nIn conclusion, we demonstrated how we integrate NVIDIA Transformer Engine into an end-to-end transformer training workflow while preserving compatibility across different Colab GPU environments. We used fused transformer modules to reduce kernel-launch overhead and memory traffic, applied FP8 autocasting with delayed scaling when supported, and retained BF16 or FP32 execution through an automatic PyTorch fallback. By training and benchmarking the same mini causal language model, we observed how hardware capability, numerical format, fused execution, and model scale influence training speed and memory consumption. We also inspected the internal scaling factors and amax history that support stable FP8 computation, which gives us a clearer understanding of how Transformer Engine manages reduced-precision arithmetic.\n\nCheck out the** Full Codes. **Also, feel free to follow us on\n\n**and don’t forget to join our**[Twitter](https://x.com/intent/follow?screen_name=marktechpost)\n\n**and Subscribe to**\n\n[150k+ML SubReddit](https://www.reddit.com/r/machinelearningnews/)**. Wait! are you on telegram?**\n\n[our Newsletter](https://www.aidevsignals.com/)\n\n[now you can join us on telegram as well.](https://t.me/machinelearningresearchnews)Need to partner with us for promoting your GitHub Repo OR Hugging Face Page OR Product Release OR Webinar etc.? [Connect with us](https://forms.gle/wbash1wF6efRj8G58)\n\nSana Hassan, a consulting intern at Marktechpost and dual-degree student at IIT Madras, is passionate about applying technology and AI to address real-world challenges. With a keen interest in solving practical problems, he brings a fresh perspective to the intersection of AI and real-life solutions.", "url": "https://wpnews.pro/news/accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels", "canonical_source": "https://www.marktechpost.com/2026/08/01/accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels-bf16-fp8-and-gpu-benchmarking/", "published_at": "2026-08-01 18:31:15+00:00", "updated_at": "2026-08-01 18:40:33.588145+00:00", "lang": "en", "topics": ["machine-learning", "artificial-intelligence", "ai-infrastructure", "ai-tools"], "entities": ["NVIDIA Transformer Engine", "PyTorch", "Ampere", "Hopper"], "alternates": {"html": "https://wpnews.pro/news/accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels", "markdown": "https://wpnews.pro/news/accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels.md", "text": "https://wpnews.pro/news/accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels.txt", "jsonld": "https://wpnews.pro/news/accelerating-transformer-training-with-nvidia-transformer-engine-fused-kernels.jsonld"}}