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A developer compiled a working RISC-V CPU into a 4B parameter model's weights

A GitHub developer using the handle divagr18 built Qwenputer, a project that compiles a 32-bit RISC-V CPU — RV32IM with the Zba extension and a bignum coprocessor — directly into the weights of Alibaba's Qwen3.5-4B model, so the model's forward pass executes instructions with no emulator loop or interpreter. According to the project's GitHub documentation, the compiled CPU passes the official riscv-tests compliance suites and runs MicroPython unmodified, processing roughly 3,200 trace tokens a second on an Nvidia L4 GPU through a Triton executor. The setup adds 11 untrained transformer layers whose weights a compiler computes directly, repurposes Qwen's Gated DeltaNet layers as RAM, and scored 100% on Peking University's NUPA numerical benchmark versus 48.6% for the unmodified Qwen3.5-4B base model.

by read5 min views1 publishedOct 28, 2026
A developer compiled a working RISC-V CPU into a 4B parameter model's weights
Image: Startupfortune (auto-discovered)

No code, no emulator script, just inference. A side project called Qwenputer turns Qwen3.5-4B into an actual processor, and it passes the same test suite real RISC-V chips use.

Most of the time when people say an AI model can "run" something, they mean it generated code that then runs somewhere else. Qwenputer is not that. A developer who goes by divagr18 on GitHub built a 32-bit RISC-V CPU: RV32IM with the Zba extension and a bignum coprocessor. That CPU was then compiled directly into the weights of Qwen3.5-4B, a small open model from Alibaba. There is no emulator loop, no interpreter, no Python script stepping through instructions. The forward pass of the model is the CPU executing.

According to the project's GitHub page and a write-up from Adafruit, the setup stacks 11 extra transformer layers in front of Qwen's own. None of those added layers are trained. A compiler computes every weight in them directly, turning logic gates and instruction decoding into fixed linear algebra the model can run during inference. The model's existing Gated DeltaNet layers get repurposed as RAM - Gated DeltaNet being a linear-attention mechanism Qwen uses for long-context efficiency. So when a program executes, its memory state is quite literally stored in the hidden state of a language model reading tokens.

That is the part that makes this different from the usual "look, an AI did something weird" demo.

The chip this produces isn't a toy simulation that gets the broad shape of RISC-V right. According to the project's documentation, it passes the official riscv-tests compliance suites, the same validation real silicon and real emulators are checked against. It also runs MicroPython exactly, with no modification to the Python runtime needed. On an Nvidia L4 GPU running through a Triton executor, the system processes roughly 3,200 trace tokens a second. That's slow next to actual hardware. But it's fast enough to boot and run interactive programs.

China's OpenBMB Releases MiniCPM5-2B, Beating Every Open Model Under 4B OpenBMB released MiniCPM5-2B on September 7, a 2.52-billion-parameter open model that tops the Artificial Analysis Intelligence Index among all models under 4 billion parameters, beating Qwen3.5-4B despite having roughly half the size. The Tsinghua NLP Lab and ModelBest joint venture also published its full training data, RL corpus, and... - open source small language models 2B parameters - MiniCPM5-2B beats Qwen3.5-4B benchmark performance

Divagr18 also tested the setup on NUPA, a benchmark built by researchers at Peking University. It isolates basic numerical operations - arithmetic, comparisons, digit understanding and format conversion - from the broader reasoning skills that most maths benchmarks conflate with it. The Qwenputer configuration scored 100% on NUPA, against 48.6% for the unmodified Qwen3.5-4B base model. That gap is the whole point of the project. A small model doing arithmetic by "thinking" about numbers gets it wrong close to half the time. The same model executing a deterministic instruction set gets it right every time: at that point it isn't reasoning about the maths, it's just running the circuit.

The comparison that comes up immediately is Doom. Developer physicsrob released a project called Torchwright Doom that compiled the 1993 game's engine to WebAssembly. It then translated each WebAssembly instruction into PyTorch tensor operations running inside a language model's computational graph. That proved the same point from a different direction: a transformer can execute arbitrary compiled code as math rather than as a program it writes and hands off.

A separate, more exhaustive project modelled every datapath unit of an actual Intel i386 as a neural network trained and verified across its full input domain - every ALU slice, every shift, every multiply. It then replayed a complete Doom frame, nearly six million instructions. The result was bit-identical to the conventional CPU, matching every byte of 128 megabytes of machine state.

Qwenputer sits in that same lineage but picks a sharper, more useful target than a 1990s shooter. RISC-V is an open instruction set architecture that real chipmakers build real silicon against. The riscv-tests suite is the actual bar vendors clear before calling a chip compliant. Passing it with weights instead of transistors is a genuinely different claim than hallucinating Doom's physics well enough to look right on screen.

Frankly, calling this a product shortcut would be a stretch. It runs at 3,200 trace tokens a second on a GPU built for running inference at scale. That makes this CPU staggeringly slower than a RISC-V core costing a few dollars in silicon. Nobody is going to deploy a language model as a replacement for an actual processor.

But as a research artifact it says something sharper than the speed numbers suggest. A 4-billion-parameter open-weight model has enough raw capacity to hold a working, standards-compliant computer inside its parameters - once a compiler hand-engineers the right layers. And it can execute programs through nothing but forward passes. For founders and engineers watching how far small, efficient open models can be pushed, that is a different kind of signal than another chatbot benchmark. It points toward interpretability research that treats a model's internals as inspectable hardware. It also points toward a harder, weirder question: how much deterministic computation can be folded into a neural network before the line between "model" and "computer" stops meaning much at all?

Also read: AMD Is Putting $1 Billion Into Meta's Own Stock Sale • Trump orders federal agencies to stop saying artificial intelligence • Moore Threads revenue jumped 147% as China bets big on homegrown GPUs

Liquid AI releases LFM3 models small enough to run on a phone LFM3-1.7B beats Alibaba's five-times-larger Qwen3.5-9B on 29 benchmarks while fitting in 1GB of memory, as Nvidia Blackwell rental prices climb 48% in two months and chip supply stays booked into 2027. - liquid AI LFM3 models for mobile phones - small language models under one gigabyte memory

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